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Verilog design - simple ALU
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Verilog design (complex blocks)
A multiplier composed of an adder
A simple ALU (AND/OR/XOR/SHL)
simple RISC processor core
SPI interface - to be updated
SPI master - to be updated
SPI slave - to be updated
Verilog examples
Basic components
combinatorial cells - tbu
full adder - tbu
Multiplexers
multiplexer 2 to 1 <mux2to1>
multiplexer 4 to 1 <mux4to1>
multiplexer 8 to 1 <mux8to1>
sequential cells - tbu
D flip-flop
Data latch
JK flip-flop - tbu
T flip-flop - tbu
Design components (building blocks)
1 of N generator
BCD up/down counter
binary up/down counter
Johnson counter
LFSR generator - tbu
Testbench components (models)
Verilog: clock generator
Verilog: reset generator
Testbenches for building blocks
Verilog: testbench for counters
Verilog-operators
Verilog-system tasks
VHDL examples
Design components (building blocks)
VHDL: 1 of N generator
VHDL: BCD up/down counter
VHDL: binary up/down counter
VHDL: Johnson counter
VHDL: n-bit ripple counter
VHDL: shift register
VHDL: state machine (semaphore)
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@ Downloads
Adobe Home page
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Adobe Reader
19 Feb 2010 12:46
IC Design
Gimp
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Graphical Image Manipulation Program
19 Feb 2010 13:12
IC Design
Notepad++
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WYSIWYG text editor with highlighting
19 Feb 2010 12:52
IC Design
OpenOffice
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free powerfull text editor suitable for creating the technical documents
19 Feb 2010 13:17
IC Design
Veritak
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Verilog simulator
19 Feb 2010 13:05
IC Design
Digital design
VHDL_Coding_eng.pdf
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VHDL coding rules and recommendations
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v. 3
20 Feb 2010 03:43
IC Design
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Digital design