// ~~~~~~~~ ~~~~~~~~ ~~~~~~~~ ~~~~~~~~ ~~~~~~~~ ~~~~~~~~// ~ --// ~ Published by: www.asic-digital-design.com// ~ --// ~ Description: This is synchronous n-bit 1 of N generator.// ~ --// ~~~~~~~~ ~~~~~~~~ ~~~~~~~~ ~~~~~~~~ ~~~~~~~~ ~~~~~~~~module shift_1ofn ( dout, clk, arst, srst, en ); parameter [31:0] n = 8; output [(n - 1):0] dout; input clk, arst, srst, en; // declaration of signals inside this block reg [(n - 1):0] reg_1ofn; reg [(n - 1):0] nxt_1ofn; always @ (posedge arst or posedge clk ) // dff_1ofn begin if ((arst == 1'b1)) begin reg_1ofn <= {(n){1'b0}}; reg_1ofn[0] <= 1'b1; end else if ((srst == 1'b1)) begin reg_1ofn <= {(n){1'b0}}; reg_1ofn[0] <= 1'b1; end else if ((en == 1'b1)) reg_1ofn <= nxt_1ofn; end // end dff_1ofn always @ (reg_1ofn) // cmb_1ofn begin nxt_1ofn <= {reg_1ofn[(n - 2):0], ~|reg_1ofn[(n - 2):0]}; end // end cmb_1ofn // outputs -- assign {dout}=reg_1ofn; //--endmodule |
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